The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 29, 2000
Filed:
Dec. 18, 1998
Ronald Thomas Taylor, Grapevine, TX (US);
STMicroelectronics, Inc., Carrollton, TX (US);
Abstract
This invention is a method for boosting the voltage level of a wordline in a DRAM having bitlines, sense amplifiers, isolation devices, bitline loads, an X decoder device and a Y select device. In the preferred method, when the wordline level reaches VDD, the decoder is disabled causing the wordline to stay at the VDD level. The sensing amplifier is also caused to be isolated so as to allow the wordline voltage to track the bitline voltage through capacitive coupling across the access MOSFET of the memory cell being read or written to. As a result, the wordline voltage is increased to a supervoltage as the bitline voltage increases. After the supervoltage is reached on the wordline, the sensing amplifier is connected causing feedback from the amplifier to drive the wordline voltage toward the VDD level and the disabled bit toward GND during this time. At the end of the wordline clock signal, the voltage is at GND and each of the bitlines are returned to their neutral mid-voltage level.