The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2000

Filed:

Jun. 15, 1999
Applicant:
Inventors:

Sunil D Mehta, San Jose, CA (US);

Brad Sharpe-Geisler, San Jose, CA (US);

Steven Fong, Santa Clara, CA (US);

Assignee:

Vantis Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518514 ; 3651851 ; 36518518 ; 36518527 ; 36518531 ; 365187 ; 365188 ; 257318 ; 257319 ; 257320 ; 257322 ;
Abstract

A zero-power non-volatile memory cell includes a control element, an avalanche injection element, and a CMOS inverter. A floating-gate electrode is capacitively coupled to the control element, the avalanche injection element, and to the CMOS inverter. The avalanche injection element is arranged, so as to transfer electrical charge onto the floating-gate electrode. The presence of stored data within the memory cell is indicated by reading a supply voltage V.sub.DD at an output terminal of the inverter. Accordingly, data can be read from the non-volatile memory cell without applying electrical power to the cell.


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