The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2000

Filed:

Dec. 31, 1997
Applicant:
Inventor:

Klaus Ruff, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 82 ; 326 30 ; 326 87 ;
Abstract

A slew rate control circuit of a bus includes two connection devices that are adapted to be coupled to two voltage supplies. The connection devices are connected to the bus by a select terminal of a signal application device. The signal application device has first and second positions which apply first and second amounts of resistance to the bus depending on the voltage on the select terminal. If an expansion board is adapted to be coupled to the bus, a different voltage is applied on the select terminal. A method for controlling a slew rate includes applying a resistive load to a bus corresponding to the number of logic circuits in a computer system. The number of logic circuits within the computer is varied by either adding or removing a logic circuit. A second resistive load is selected to be applied to the bus after the number of logic circuits in the computer system has been varied. The selection of a second resistance enables the amount of slew rate to be reduced.


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