Manufacturing process and structure of capacitor

Abstract

A method for manufacturing a capacitor, applied to a memory unit having a substrate forming thereon a dielectric layer, includes the steps of a) forming a sacrificial layer over the dielectric layer, b) partially removing the sacrificial layer and the dielectric layer to form a contact window, c) forming a first conducting layer over the sacrificial layer and in the contact window, d) partially removing the first conducting layer and the sacrificial layer to expose a portion of the sacrificial layer and retain a portion of the first conducting layer, e) forming a second conducting layer alongside the portion of the first conducting layer and the portion of the sacrificial layer, f) removing the portion of the sacrificial layer to expose the dielectric layer, g) forming a third conducting layer over surfaces of the portion of the first conducting layer, the second conducting layer, and the dielectric layer, and h) partially removing the third conducting layer while retaining a portion of the third conducting layer under the portion of the first conducting layer and the second conducting layer and on the dielectric layer. The fabricated capacitor has a generally crosssectionally modified T-shaped structure which not only effectively increases the surface area of the capacitor but only has a smooth top surface which is conducive to the subsequent planarization process.