The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2000
Filed:
Dec. 31, 1997
Mark S Milshtein, Hillsboro, OR (US);
Thomas D Fletcher, Portland, OR (US);
Terry Chappell, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A pulse generating circuit includes a first pulse generating circuit for generating a first output pulse, and a second pulse generating circuit for outputting a second output pulse. Each pulse generating circuit comprises a stack of two n-channel transistors and a reset circuit. The reset circuit includes two p-channel transistors and two inverters and is provided for automatically resetting the pulse generating circuits. The second pulse generating circuit includes a delay element for introducing an additional gate delay in the generation of the second output pulse. The additional gate delay introduces an asymmetry in the output pulses which offsets or cancels a previously introduced asymmetry of an input clock signal to generate an output clock signal having a constant period. Clock gating circuitry is provided for selectively enabling and disabling at least one of said pulse generator circuits.