The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 08, 2000
Filed:
Mar. 12, 1997
Kazutoshi Ishii, Chiba, JP;
Naoto Inoue, Chiba, JP;
Koushi Maemura, Chiba, JP;
Shoji Nakanishi, Chiba, JP;
Yoshikazu Kojima, Chiba, JP;
Kiyoaki Kadoi, Chiba, JP;
Takao Akiba, Chiba, JP;
Yasuhiro Moya, Chiba, JP;
Kentaro Kuhara, Chiba, JP;
Seiko Instruments, Inc., Chiba, JP;
Abstract
To decrease the area of a chip, improve the manufacturing efficiency and decrease the cost in a semiconductor device such as a driver integrated circuit having a number of output pads, and an electronic circuit device such as electronic clock. There are disposed output pads superposed in two dimensions on driving transistors or logic circuits connected thereto, respectively. Further, not only aluminum interconnection but also bump electrodes or barrier metals are used for the interconnection of the semiconductor device. In a case where a semiconductor integrated circuit is electrically adhered on to a printed circuit board in a face down manner, a solder bump disposed on the semiconductor integrated circuit and the interconnection of the printed circuit board are directly connected to each other, thereby realizing the electrical connection. On this occasion, the bump electrode as the external connecting terminal of the semiconductor integrated circuit is laminated on the transistor.