The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2000
Filed:
Mar. 10, 1998
Bradley W Scheer, San Jose, CA (US);
J Jerry Prochazka, Clayton, CA (US);
VLSI Standards, Inc., San Jose, CA (US);
Abstract
An atomic-level step-height standard with step heights less than about 100 .ANG. is in the form of a silicon wafer die with a generally smooth reflective surface but with a periodic pattern of alternating parallel flat linear mesas and valleys having a rectangular cross-section. The periodicity of this pattern of surface features is less than 100 .mu.m and preferably about 20 .mu.m. Certification of the standard involves measuring the pitch and the line or space width of the mesas or valleys using a calibrated probe microscope in order to determine the pattern's duty cycle (C), and also measuring a bidirectional reflectance distribution function for light scattered from the periodic pattern using an angle-resolved scatterometer. From this measurement, a one-dimensional power spectral density function is calculated, then an RMS roughness (R.sub.q) value is derived. The characteristic step height (H) of the standard can then be certified as being H=R.sub.q [C(1-C)].sup.-1/2, provided the measurements and calculations are done over a sufficiently wide spatial frequency bandwidth. The certified standard may then be used to calibrate various step-height measuring instruments.