The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2000

Filed:

Aug. 04, 1995
Applicant:
Inventor:

Chiao-Yen Tai, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
708552 ;
Abstract

An apparatus and a method for indicating the computational adder overflow status of bit-variable data employing a pipelining adder. An adder is provided with a first input port and a second input port, for adding a multiple-bit data input from the second input port. A plurality of shift registers receive and store in parallel a plurality of multiple-bit data output from the adder, and sequentially output the plurality of multiple-bit data to the second input port of the adder in response to a clock signal. A comparing circuit simultaneously receives and compares a multiple-bit data output from the adder and a multiple-bit data output from a plurality of shift registers. An overflow arbitrating unit arbitrates the overflow status of each multiple-bit data in accordance with a comparing result from the comparing circuit as well as a selective signal.


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