The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 21, 1999
Filed:
Dec. 18, 1997
Hal Lee, Taipei, TW;
United Microelectronics Corp., Taiwan, CH;
Abstract
A method for manufacturing DRAM capacitor comprising the steps of providing a substrate having a transistor already formed thereon and an insulating layer covered on top, wherein the insulating layer has an opening exposing one source/drain region of the transistor. Next, a first conductive layer, a first hemispherical grained silicon layer and a material layer are sequentially formed over the insulating layer and the source/drain region exposed through the contact opening, and then followed by a patterning operation. After that, a second conductive layer, a second hemispherical grained silicon layer are sequentially formed over the device, and then etched to expose the insulating layer and the material layer. Subsequently, the material layer is removed to expose the first hemispherical grained silicon layer forming a lower electrode. Finally, a dielectric layer and an upper electrode are sequentially formed over the lower electrode. The characteristic of this invention includes an effective increase in the surface area of the capacitor, the lowering of profile height of the capacitor, and the prevention of spike formation and its associated problems.