The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 1999

Filed:

Nov. 11, 1998
Applicant:
Inventors:

James A Komarek, Newport Beach, CA (US);

Clarence W Padgett, Westminster, CA (US);

Scott B Tanner, Irvine, CA (US);

Shin-ichi Kojima, Amagasaki, JP;

Jack L Minney, Irvine, CA (US);

Motohiro Oishi, Irvine, CA (US);

Keiji Fukumura, Hyougo, JP;

H Nakanishi, Hyougo, JP;

Assignee:

Creative Integrated Systems, Santa Ana, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ; G11C / ;
U.S. Cl.
CPC ...
3651895 ; 365226 ; 36523008 ;
Abstract

An input receiver circuit in a read-only memory is provided with a feedback to control hysteresis. A second stage and an additional output is added to the receiver. Switching circuit noise from inside of the read-only memory is isolated by the added state and outputs, and cannot be fed back into the receiver circuit to affect the detection of the TTL voltage levels. Use of wide and long FET sizes minimizes the manufacture related variations in the input receiver switching levels.


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