The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 1999

Filed:

Jan. 20, 1998
Applicant:
Inventors:

Shigeki Sawada, Kyoto, JP;

Takashi Furuta, Shiga, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438202 ; 438234 ; 148D / ;
Abstract

Formed on a p-type semiconductor substrate are bipolar transistors and CMOS transistors. A bipolar transistor has a base extraction electrode a side-surface of which is covered with an oxide layer, a silicon nitride layer, and a polysilicon layer. A CMOS transistor has a gate electrode a side-surface of which is covered with an oxide layer, a silicon nitride layer, and a side-wall layer. The silicon nitride layer on the side-surface of the base extraction electrode is formed by the same fabrication step that the silicon nitride layer on the side-surface of the gate electrode is formed.


Find Patent Forward Citations

Sawada, Shigeki. (1999). Semiconductor integrated circuit apparatus and associated fabrication (U.S. Patent No. 6001676). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6001676

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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