The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 1999

Filed:

Dec. 19, 1997
Applicant:
Inventors:

Stephen K Loh, Fishkill, NY (US);

Christine Dehm, Munich, DE;

Christopher C Parks, Beacon, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438243 ; 438786 ; 438791 ;
Abstract

A method for controlling dopant outdiffusion within an integrated circuit is disclosed. The method includes providing a substrate, forming a trench in the substrate, and forming a first doped layer in the trench. The first doped layer has a first dopant concentration. The method further includes forming a dopant diffusion control structure above the first doped layer. The dopant diffusion control structure includes silicon nitride (Si.sub.x N.sub.y) disposed in grain boundaries of the first doped layer. The method also includes forming a second layer above the dopant diffusion control structure. The second layer has a second dopant concentration lower than the first dopant concentration. Forming the dopant diffusion control structure includes, in one example, forming a first oxide layer over the first doped silicon layer, nitridizing the first oxide layer, thereby forming an oxynitride (SiO.sub.x N.sub.y) layer and causing the silicon nitride to migrate into the grain boundaries, and removing the oxynitride layer, thereby exposing the silicon nitride at the grain boundaries at an interface of the first doped layer.


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