The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 1999

Filed:

Feb. 04, 1999
Applicant:
Inventors:

Peter Holzmann, Campbell, CA (US);

James Brennan, Jr, Saratoga, CA (US);

Anthony Dunne, Cupertino, CA (US);

Hieu Van Tran, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518509 ; 36518521 ;
Abstract

A trimbit circuit for flash memory integrated circuits is described. The trimbit circuit is used to store the addresses of bad rows and/or columns in flash memory arrays. Furthermore the trimbit circuit is used to store the trimbits for trimable circuits in the integrated circuit, i.e. voltage references, precision oscillator, etc. The invention includes a row of flash memory trimcells and a trimcell differential amplifier circuit. The trimcell differential amplifier circuit can serially shift in trimbits into a latch and serially shift out trimbits without having to program the flash memory trimcells. The final settings of the trimbits can be programmed by means of a high voltage buffer. A non-overlapping clock generator and additional logic is also included to control the circuit.


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