The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 1999

Filed:

Apr. 06, 1998
Applicant:
Inventors:

Moritsugu Morita, Kanagawa, JP;

Hirofumi Tanaka, Kanagawa, JP;

Kazuhito Fujita, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257729 ; 257699 ; 257787 ;
Abstract

Polyimide layers having special properties are formed on the bottom surface of a metallic body for a metal-based semiconductor circuit substrate with a polyimide layer as an insulator. There are four lamination methods: (a) a method in which a layer of thermoplastic polyimide resin (1) and a layer of non-thermoplastic polyimide resin are laminated on the bottom surface of the metallic body one over another in this order, (b) a method in which a layer of thermoplastic polyimide resin (1), a layer of non-thermoplastic polyimide resin and a layer of thermoplastic polyimide resin (2) are laminated on the bottom surface of a metallic body one over another in this order, (c) a method in which a layer of non-thermoplastic polyimide resin is laminated on the bottom surface of a metallic body and (d) a method in which a layer of thermoplastic polyimide resin (2) is laminated on the bottom surface of a metallic body. The resulting semiconductor circuit substrate has improved properties: flat joins to connect external terminals, small variations in shape due to temperature changes, the mounting properties to a mother board, the absorption efficiency of infrared rays during solder reflowing, plating resistance and the bonding reliability to other objects.


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