The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 1999
Filed:
Sep. 30, 1997
Applicant:
Inventors:
Hironori Akamatsu, Osaka, JP;
Toshio Yamada, Osaka, JP;
Hisakazu Kotani, Hyogo, JP;
Yoshiro Nakata, Nara, JP;
Assignee:
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711170 ; 711105 ; 711106 ; 711172 ; 365 51 ;
Abstract
A CPU acting as a mother chip, in combination with a DRAM acting as a subsidiary chip, is mounted. A mode output circuit is able to set the storage capacity of the DRAM as well as the refresh cycle of the DRAM for forwarding to a mode input circuit of the CPU through a mode output terminal of the DRAM and a mode input terminal of the CPU. The CPU controls an address generator according to the data from the mode input circuit, to set the number of bits of address data for access to the DRAM according to the DRAM storage capacity and the DRAM refresh cycle.