The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 1999

Filed:

Sep. 29, 1997
Applicant:
Inventors:

James P Kardach, Saratoga, CA (US);

Gunjeet D Baweja, Sunnyvale, CA (US);

Chin-Shu Tan, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
713500 ; 713600 ;
Abstract

An integrated circuit having a terminal for receiving a first signal, a terminal for receiving a second signal, and circuitry for generating a reset signal is disclosed. The reset signal is asserted based on a transition of the first signal when the second signal is in a predetermined state. In one embodiment the first signal is a suspend clock signal, the second signal is a suspend status signal, and the reset signal is used to reset a resume well within the integrated circuit. Thus, the integrated circuit can be used in a computer system which has a suspend mode with a resume sequence during which the resume well is reset, without requiring that the integrated circuit include an extra terminal for indicating when to reset the resume well.


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