The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 1999

Filed:

Mar. 03, 1998
Applicant:
Inventors:

Naoji Senba, Tokyo, JP;

Yuzo Shimada, Tokyo, JP;

Ikusi Morizaki, Tokyo, JP;

Hideki Kusamitu, Tokyo, JP;

Makoto Ohtsuka, Tokyo, JP;

Katsumasa Hashimoto, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H05K / ;
U.S. Cl.
CPC ...
257686 ; 257685 ; 257737 ; 257738 ; 257774 ; 257723 ; 257730 ;
Abstract

A three-dimensional memory module includes a plurality of semiconductor device units, every adjacent two of which are stack-connected via through-holes by a bump connecting method. Each of the plurality of semiconductor device units includes a carrier having a circuit pattern and the through-holes connected to the circuit pattern. The semiconductor device unit also includes at least one semiconductor memory chip mounted on the carrier such that the semiconductor memory chip is connected to the circuit pattern, and at least one chip select semiconductor chip mounted on the carrier to be connected to the circuit pattern such that the chip select semiconductor chip can select the semiconductor memory chip.


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