Repairable semiconductor integrated circuit memory by selective

Abstract

A method and apparatus for repairing a memory device through a selective domain redundancy replacement (SDRR) arrangement, following the manufacture and test of the memory device. A redundancy array supporting the primary arrays forming the memory includes a plurality of redundancy groups, at least one of which contains two redundancy units. A redundancy replacement is hierarchically realized by a domain that includes a faulty element within the redundancy group, and by a redundancy unit that repairs the fault within the selected domain. SDRR allows a domain to customize the optimum number and size redundancy units according to existing fault distributions, while achieving a substantially saving in real estate, particularly over the conventional flexible redundancy replacement, in term of the number of fuses (10-20%). By combining several types of redundancy groups, each having a different number of redundancy elements, full flexible redundancy replacement can also be achieved. Consequently, this approach compensates for the drawback of existing intra-block replacements, flexible redundancy replacements, and variable domain redundancy replacements, while improving repairability irrespective of the fault distribution within the memory device.