The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 1999

Filed:

May. 09, 1997
Applicant:
Inventors:

Steve P Kornachuk, San Jose, CA (US);

Craig R Silver, Cupertino, CA (US);

Scott T Becker, San Jose, CA (US);

Assignee:

Artisan Components, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B / ;
U.S. Cl.
CPC ...
714724 ; 714725 ; 714733 ;
Abstract

Disclosed is a programmable memory test interface. The test interface includes logic circuitry configured to be integrated to a memory device. The memory device has a plurality of receiving connections that are configured to be coupled to a plurality of internal connections that couple to the logic circuitry. The interface further includes a plurality of programmable input pins and output pins leading to and from the logic circuitry, and the programmable input pins and output pins are configured to receive control signals from a test controller for operating the memory device in either a test mode or a mission mode. The programmable input pins and output pins are selectively interconnected to transform the logic circuitry into at least one type of memory testing methodology interface.


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