The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 1999
Filed:
Nov. 24, 1997
Fumihiko Hayashi, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
A TFT with a drain-offset structure is provided, which realizes a high ON current while keeping an OFF current at a low level. This TFT includes a substrate and a patterned semiconductor film formed on a main surface of the substrate. At least the main surface of the substrate has an insulating property. The patterned semiconductor film is made of a silicon-system semiconductor material and is not monocrystalline. The patterned semiconductor film includes a source region of a first conductivity type, a channel region of a second conductivity type opposite to the first conductivity type, a first drain region of the first conductivity type, and a second drain region of the second conductivity type. The first drain region serves as an offset region. A gate electrode is formed to be opposite to the channel region through a gate insulating film. The source region is formed on one end of the semiconductor film. The second drain region is formed on an opposite end of the semiconductor film to the source region. The channel region is formed to be adjacent to the source region and the first drain region. The first drain region is formed to be adjacent to the channel region and the second drain region.