The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 1999

Filed:

Dec. 19, 1997
Applicant:
Inventor:

Gianluca Colli, Santa Clara, CA (US);

Assignee:

STMicroelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323288 ; 323317 ;
Abstract

A voltage regulator (400) having a charge pump includes a bias current circuit (402) which produces a bias current (I.sub.bias). The bias current (I.sub.bias) is mirrored by a first mirror circuit (404) and multiplied by gain stage Q4.sub.beta and mirrored again by a factor 'c' on the output of DMOS2. The same I.sub.bias is mirrored by a ratio 'b' and multiplied by the product of Q5.sub.beta and Q6.sub.beta. The push-pull current operation at the output terminal (416) is obtained by turning on and off switches SW1 (418) and SW2 (420) that are controlled by a clock signal. The voltage regulator (400) further includes an output voltage clamp (424) that keeps control of the V.sub.boost voltage by controlling the amount of bias current (I.sub.bias).


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