The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 1999

Filed:

Mar. 12, 1997
Applicant:
Inventor:

Witawat Wijaranakula, Vancouver, WA (US);

Assignee:

SEH America, Inc., Vancouver, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B / ;
U.S. Cl.
CPC ...
117-2 ; 438142 ; 438144 ; 117935 ;
Abstract

A semiconductor silicon wafer (10) useful as a calibration standard for measurement of a thickness (18) of a microdefect-free layer (16) is formed by depositing an epitaxial layer onto a substrate (12) having an interstitial oxygen concentration suitable for precipitating oxide. Large, uniform oxide microdefects (14) are formed in the substrate by maintaining the semiconductor silicon wafer at between 600.degree. C. and 900.degree. C. to nucleate oxide precipitates that are then grown at between 800.degree. C. and 1,200.degree. C. Because the epitaxial layer contains no oxide precipitate nuclei to form microdefects, the epitaxial layer remains a microdefect-free layer and has a relatively sharp, easily detectable boundary with the substrate. The epitaxial layer can be polished to a reduced thickness, if desired.


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