The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 1999
Filed:
Feb. 17, 1998
Li Yeat Chen, Hsinchu, TW;
Ing-Ruey Liaw, Hsinchu, TW;
Vanguard International Semiconductor Corporation, Hsin-Chu, TW;
Abstract
A crown capacitor for a memory device is formed using (1) an important early poly plug 42 process and (2) an etch barrier layer 34. A first insulating layer 30 and an etch barrier layer are formed over device structures and the substrate 10. A node contact hole 40 is formed through the etch barrier layer 34 and the first insulating layer 30. A plug 42 is formed filling the node contact hole 40. Next, a planarizing layer 44 is formed over the etch barrier layer 34 and the plug 42. A crown hole 46 is formed in the planarizing layer 44 exposing the plug 42. A first polysilicon layer 50 is deposited over the etch barrier layer, the plug 42, and the remaining first planarizing layer 44A. A Sacrificial layer 54 is formed over the first polysilicon layer 50 thereby filling the crown hole 46. The sacrificial layer 54 and the first polysilicon layer 50 are etch back to remove the exposed portions of the first polysilicon layer 50 over the planarizing layer 44A. The sacrificial layer 54 is selectively removed thereby forming a crown shaped storage electrode 42 50.