The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 14, 1999
Filed:
Sep. 18, 1997
Applicant:
Inventors:
Shiva Gowni, Carrollton, TX (US);
Purushothaman Ramakrishnan, Bangalore, IN;
Padma Nagaraja, Bangalore, IN;
Assignee:
Cypress Semiconductor Corp., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
327362 ; 327262 ; 327333 ; 327400 ; 326 29 ; 326 80 ; 36518911 ; 365194 ;
Abstract
The output (3) of a level shifter (1) is split into two paths (4,5) with a delay (.tau..sub.1, .tau..sub.2) being introduced into at least one path to enable rise delay and fall delay to be controlled independently of one another. In the context of an integrated circuit which includes a memory device, the use of an additional path allows control of the set-up and hold times in that one transition can be speeded up or slowed down independently of the other transition to achieve the best possible set-up and hold times.