The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 1999

Filed:

Dec. 23, 1997
Applicant:
Inventors:

Scott D Willingham, Sunnyvale, CA (US);

William J McFarland, Los Altos, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
327-8 ; 327235 ; 327163 ;
Abstract

A circuit for generating a signal that is proportional to the phase difference between a reference signal and a variable frequency signal. The circuit includes a reference generating circuit for generating N phase shifted reference signals from the reference signal. Each of the phase shifted reference signals has the same frequency and a different phase. The phase of the n.sup.th one of the phase shifted reference signals is equal to 360n/N degrees, where N>1 and n runs from 0 to N-1. A phase detection circuit generates a phase output signal proportional to the phase difference between the variable frequency signal and the phase shifted reference signal currently being outputted by the reference generating circuit. The phase output signal has value of I when the output signal corresponds to a phase difference of 360/N degrees. An overflow detection circuit determines when the phase output signal has an absolute value greater than I and generates a count signal and a phase adjustment signal when this situation is detected. The phase adjustment signal is coupled to the reference generating circuit and causes the reference generating circuit to select a new phase shifted reference signal. A counter is then incremented/decremented to track the accumulated phase adjustments. A digital to analog converter converts the digital value in the counter to a signal having an amplitude equal to MI, where M is the digital value. A sum circuit adds this signal to the phase output signal.


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