The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 1999
Filed:
Apr. 22, 1997
Jemmy Wen, Hsinchu, TW;
Abstract
A semiconductor read-only memory (ROM) device having a silicon-on-insulator (SOI) structure and a method for fabricating the same are provided. The SOI structure permits isolation of the source/drain regions from the underlying substrate, thereby preventing leakage current therebetween. The ROM device of the present invention is smaller than conventional ROM devices, and thus provides increased integration without generating leakage paths due to misalignment of the contact windows used to form metal interconnects. The ROM device includes a plurality of parallel gate regions and a grid-like polysilicon conductive layer. The grid-like structure includes a plurality of substantially parallel source/drain regions on both sides of the gate regions, and a plurality of substantially parallel channel regions crossing the source/drain regions and the gate regions at right angles. Select locations of the channel regions are impurity-doped, causing the associated memory cells to be set to a permanently-OFF state. Whereas, the undoped channel regions are associated with memory cells to be set to a permanently-ON state.