Methods of forming trench isolation regions using repatterned trench

Abstract

Methods of forming trench isolation regions include the steps of forming trenches in a semiconductor substrate using an etching mask having openings therein, and then patterning the mask to enlarge the openings. The trenches and the enlarged openings are then filled with an electrically insulating material and then the insulating material is planarized using a polishing technique (e.g., CMP) and/or a chemical etching technique, to define the final trench isolation regions. Here, at least a portion of the etching mask is also used as a planarization stop. Using these methods, trench isolation regions can be formed having reduced susceptibility to edge defects because the periphery of the trench at the face of the substrate is covered by the electrically insulating material. In particular, a preferred method of forming a trench isolation region includes the steps of forming a trench masking layer on a face of a semiconductor substrate and then patterning the masking layer to define at least a first opening therein which exposes a first portion of the face. The exposed first portion of the face of the substrate is then preferably etched to define a trench therein, using the trench masking layer as an etching mask. The trench masking layer is then repatterned to enlarge the size of the first opening. An electrically insulating region is then formed in the trench and in the enlarged first opening using a preferred deposition technique. Finally, the insulating region is planarized to be level with an upper surface of the trench masking layer, by using the trench masking layer as a planarization stop.