The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 1999

Filed:

May. 23, 1997
Applicant:
Inventors:

Jonathan K Abrokwah, Tempe, AZ (US);

Ravi Droopad, Tempe, AZ (US);

Corey D Overgaard, Phoenix, AZ (US);

Brian Bowers, Mesa, AZ (US);

Michael P LaMacchia, Gilbert, AZ (US);

Bruce A Bernhardt, Chandler, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438172 ; 438604 ;
Abstract

A method of fabricating submicron HFETs includes forming a buffered substrate structure with a supporting substrate of GaAs, a portion of low temperature AlGaAs grown on the supporting substrate at a temperature of approximately 300.degree. C., a layer of low temperature GaAs grown on the portion AlGaAs layer at a temperature of 200.degree. C., a layer of low temperature AlGaAs grown on the GaAs layer at a temperature of 400.degree. C., and a buffer layer of undoped GaAs grown on the second AlGaAs layer. Complementary pairs of HFETs can be formed on the buffered substrate structure, since the structure supports the operation of p and n type transistors equally well.


Find Patent Forward Citations

Loading…