The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 1999
Filed:
May. 27, 1998
Howard C Kirsch, Austin, TX (US);
Chih-Yuan Lu, Hsinchu, TW;
Vanguard International Semiconductor Corporation, Hsin-Chu, TW;
Abstract
A method and design for stitching polysilicon wordlines to straps formed of interconnected metal line segments formed in two or more metallization levels. Each strap comprises a continuous conductive metal line passing alternatively from one metal layer to another in a selected sequence. The sequence of segments in each strap alternates in phase with the sequence in next nearest neighbor straps but may be in phase with second nearest neighbor straps. Thereby the pitch of strap segments on each metallization level is at least twice that of the subjacent polysilicon wordlines. The total length of each metal in each strap is the same in all straps. This arrangement allows the use of metals having different resistivities in each strap with all the straps having identical overall resistance. The metals used in the two or more levels may also have different minimum design rules without compromising the identical overall performance of all the straps. In a second embodiment a method and design is described for doubling the length of polysilicon sub-wordlines in a sub-wordline memory array without reducing performance by connecting sub-wordline to sub-wordline decoders by metal straps connected to the sub-wordlines midpoints.