The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 1999
Filed:
Oct. 31, 1997
Abstract
Isolation regions are formed on a top surface of a wafer. An ion implantation is performed to implant ions into the wafer. Then, an thermal anneal process is used to form an implanted layer on the wafer. Then, a silicon dioxide or silicon nitride layer is deposited on the implanted layer. Next, a micro inductor is patterned on the insulator layer. Subsequently, a dielectric layer is formed on the inductor for isolation. Next, via holes are created by etching the dielectric layer. A conductive layer is patterned on the dielectric layer and refilled into the via holes. Next, a passivation layer is deposited on the dielectric layer and the conductive layer. An etching is performed to etch the wafer from a bottom surface (a second surface) of the wafer. Finally, a ground plate is connected to the bottom surface (second surface) of the wafer.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile