The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 1999

Filed:

Feb. 14, 1997
Applicant:
Inventors:

Shin Matsuda, Kokubu, JP;

Shingo Sato, Kokubu, JP;

Assignee:

Kyocera Corporation, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
2282481 ; 228254 ; 427 96 ; 427123 ; 148 24 ; 148 23 ; 148 22 ;
Abstract

A method of fabricating a package for housing a semiconductor element, comprising applying solder paste within plural depressions which are formed on at least one principal surface of an insulating substrate and have electrical connection pads, protruding the surface of the solder paste from the principal surface of the insulating substrate, mounting solder balls on the surface of the solder paste, and fusing the solder paste and the solder balls to produce unitary structures in order to form connection terminals with spherical protrusions.


Find Patent Forward Citations

Matsuda, Shin. (1999). Method of fabricating package for housing semiconductor element (U.S. Patent No. 5918796). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5918796

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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