The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 1999
Filed:
Jul. 11, 1997
Richard G Yamasaki, Torrance, CA (US);
Tzu-Wang Pan, Irvine, CA (US);
Silicon Systems, Inc., Tustin, CA (US);
Abstract
An improved Viterbi detector for use in a partial-response maximum-likelihood (PRML) channel. The present invention reduces the amount of hardware necessary in the conventional digital implementation, as well as increasing the speed of the system, by utilizing analog circuits. Whereas prior art analog implementations use more complex hardware and less efficient algorithms, the present invention utilizes easily realizable circuitry to perform a more efficient algorithm. A sampled data Viterbi detector compares a sampled analog input signal with two threshold signals. The binary outputs of the comparing means are then provided to a survival sequence register, as well as being used to formulate new threshold signals for the subsequent input sample. The hardware implements Ferguson's method for calculating sequence metrics by representing the accumulated metric difference as two threshold signals. Probability based decisions are then performed in analog comparators. Because Ferguson's method only requires formulation of the difference between metrics rather than formulation of the true metrics themselves, the successive threshold signals that represent this difference can be generated using multi-input track and hold circuits and a voltage summing means.