The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 1999
Filed:
Dec. 20, 1995
Intel Corporation, Santa Clara, CA (US);
Abstract
An element of a multi-functional device that integrates a high performance processor into a PCI to PCI bus bridge (P2P). The invention is part of a design that consolidates a high performance processor (the local processor) and other processing elements into a single system which utilizes a local memory. Four PCI interrupt inputs are provided which can be routed to either local processor interrupt inputs or to PCI Interrupt output pins. In this manner, a server designer is able to connect the PCI interrupts directly to the local processor without any jumpers to provide configuration. Additionally, by providing software which would execute on the local processor, the local processor system can intercept the PCI interrupts and process the low level interrupts to create an intelligent I/O subsystem. A simple multiplexor is used to direct the PCI interrupts inputs to the local processor or directs the PCI interrupt inputs directly to the PCI interrupt outputs. The PCI interrupt inputs would be interrupts from PCI devices connected to the secondary PCI bus or PCI add-in cards connected to the secondary PCI bus. The PCI outputs would go directly to an interrupt controller which supports the host processor interrupt structure. This PCI interrupt output mechanism supports the ability to have the local processor intercept the PCI interrupts, determine if the local processor should process the interrupt or forward the interrupt upstream to the host.