Method for protecting an alignment mark on a semiconductor substrate

Abstract

A method for maintaining an alignment mark on a semiconductor substrate includes formation of an opening called a 'protective window,' that is sufficiently deep to ensure that an alignment mark formed at the bottom of the preventive window remains intact during planarization, e.g. by chemical mechanical polishing. Prior to planarization, the protective window has a height that is larger than a predetermined distance known to be sufficient to protect the alignment mark. The protective window is created by etching away one or more layers, such as a layer of metal and a layer of polysilicon simultaneously with etching steps normally required to create patterns for electronic devices on the substrate. Such creation of a protective window prior to planarization eliminates the need for masking and etching steps conventionally used after planarization to recover an alignment mark.