The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 1999
Filed:
Dec. 04, 1997
Sheng Teng Hsu, Camas, WA (US);
Katsumasa Fujii, Nara, JP;
Hidechika Kawazoe, Nara, JP;
Jong Jan Lee, Camas, WA (US);
Sharp Microelectronics Technology, Inc., Camas, WA (US);
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A MOS transistor having a multilevel gate oxide layer is provided for use in an ESD protection circuit. A thick gate oxide layer near the drain insures that the transistor has a relatively large drain to gate breakdown voltage. A thin gate oxide layer near the source permits the gate voltage to turn the transistor on and off with rapid switching speeds. The thick portion of the MOS transistor multilevel gate oxide layer is formed with a local oxidation of silicon (LOCOS) process, while the thin gate layer is formed in a separate step. An ESD protection circuit and method for fabricating the above-mentioned multilevel gate oxide layer MOS transistor are also provided.