The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 1999

Filed:

Sep. 30, 1997
Applicant:
Inventors:

Masahiko Maeda, Kanagawa, JP;

Takamitsu Harada, Kanagawa, JP;

Hisami Motoura, Kanagawa, JP;

Eiichi Asano, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438690 ; 438691 ; 438692 ;
Abstract

A process for precisely and efficiently manufacturing a semiconductor wafer is provided, which can prevent contamination by metals inside silicon crystals and remove the factors that degrade the GOI produced during the wafer manufacturing steps. A sliced and chamfered semiconductor wafer is subjected to lapping. The lapped semiconductor wafer is then etched, and thus the working strains produced by lapping is removed. The two sides of the etched semiconductor wafer are then primary polished with a dual-surface polishing machine. The primary polished semiconductor wafer is etched with an aqueous solution of 1% NaOH solution. The weak alkali etched semiconductor wafer is then mirror processed by a finish polishing. The finish polished semiconductor wafer is washed with an SC-1 solution.


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