Self-aligned antifuse with base

Abstract

A method of integrating a low aspect ratio antifuse into low capacitance interconnect levels which involves fabrication of an antifuse base which is self-aligned to either a lower interconnect level or the antifuse dielectric. The method provides maximum allowable registration tolerance for the antifuse onto its base without incurring any increase in the pitch of the interconnect. The antifuse base is required to minimize the capacitance between the lower and upper interconnect levels. This is accomplished by providing over a lower interconnect pattern, such as, for example, aluminum over titanium tungstide (TiW), a barrier metal, such as, for example, TiW. The barrier metal separates one of the interconnect layers from the amorphous silicon dielectric. The barrier metal also acts as a raised base for the antifuse, providing increased spacing between the upper and lower interconnect patterns, thereby minimizing the capacitance therebetween.