Process for forming photoresist mask over integrated circuit structures

Abstract

A process for forming a photoresist mask over a patternable layer of an integrated circuit structure formed on a semiconductor substrate is described wherein the photoresist mask is initially formed with oversized lateral dimensions over a layer of patternable material of an integrated circuit on a semiconductor substrate. The oversized resist mask is then optionally measured in a vacuum apparatus to determine the size of the critical dimensions; then dry etched, preferably in the same vacuum apparatus, to reduce the size of the resist mask; then measured to determine the size of the critical dimensions (preferably again in the same vacuum apparatus); and then, if necessary, further dry etched to further reduce the size of the critical dimensions. The dry etching and subsequent measurement steps are repeated until the desired critical dimensions of the resist mask are reached. If the dry etching step should accidentally overetch the resist pattern, the structure can still be reworked by removing the resist mask and applying a fresh resist layer as in the prior art. After the correctly sized resist mask has been formed and determined by the cycle of dry etch and measurement steps, the underlying patternable layer can be etched through the photoresist mask, with a greatly reduced chance that the etched pattern in the underlying layer will have unsatisfactory dimensions.