The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 1999

Filed:

Jun. 21, 1996
Applicant:
Inventors:

Paige A Kolze, San Jose, CA (US);

William D Cox, San Jose, CA (US);

Kevin K Yee, San Jose, CA (US);

Assignee:

QuickLogic Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 41 ; 326 40 ;
Abstract

An interface cell for a programmable integrated circuit includes a pad, an input buffer, a first routing conductor, a plurality of second routing conductors, and a plurality of antifuses. The input of the input buffer is coupled to the pad and the output of the input buffer is coupled to the first routing conductor so that an input signal from the pad can be supplied onto the first routing conductor without passing through any programmed antifuses. The second routing conductors extend parallel to one another in a direction perpendicular to the direction in which the first routing conductor extends. The second routing conductors cross the first routing conductor and then pass out of the interface cell and into a routing channel of the programmable integrated circuit. One of the antifuses is disposed at each location where one of the second routing conductors crosses the first routing conductor. Accordingly, an input signal from the pad can be supplied onto any desired one of the second routing conductors of the routing channel by programming only one antifuse. The interface cell contains an enablable register, the control inputs of which can be independently driven from any conductor in the adjacent routing channel. Combinatorial and registered outputs of the interface cell can be simultaneously routed to the routing channel and some interface cell outputs have 2.times. drive strength.


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