The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 30, 1999

Filed:

Apr. 18, 1997
Applicant:
Inventor:

Muthurajan Jayakumar, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395500 ; 395733 ; 395737 ;
Abstract

A multiprocessor computer system that includes an emulation feature for lowest priority processor software compatibility while providing fault tolerance includes first and second processors coupled to a system bus that handles transmission of interruption messages within the system. An instruction resulting in an interruption which specifies an interrupt feature causes microcode to generate a trap. A trap handling routine reads ID information from a register of the first processor, and places it in a target processor ID field of an interruption message which gets broadcast on the system bus. The first processor eventually accepts the interruption message and is designated as the processor in the system which handles the interruption.


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