The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1999
Filed:
May. 24, 1996
Edgardo F Klass, Palo Alto, CA (US);
Chaim Amir, Sunnyvale, CA (US);
David W Poole, Mountain View, CA (US);
Alan C Rogers, Palo Alto, CA (US);
Sun Microsystems, Inc., Mountain View, CA (US);
Abstract
A dynamic logic signal repeater includes a complementary dynamic logic circuit with an input node to receive an input signal and an output node storing a precharge signal. The complementary dynamic logic circuit configuration, transistor sizing, and the use of a precharge driver results in a signal transition trip point for the precharge signal on the output node that is substantially equivalent to the signal transition trip point of a static logic circuit. Thus, the dynamic logic signal repeater has improved noise immunity. An evaluation locking transistor is connected to the complementary dynamic logic circuit and the output node. The evaluation locking transistor prevents the charging of the output node during a dynamic logic evaluation period.