The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1999
Filed:
Apr. 02, 1996
Salvador P Umotoy, Antioch, CA (US);
Alan F Morrison, San Jose, CA (US);
Karl A Littau, Palo Alto, CA (US);
Richard A Marsh, Austin, TX (US);
Lawrence Chung-Lai Lei, Milpitas, CA (US);
Dale DuBois, Los Gatos, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
This invention provides a method and apparatus for supporting a wafer in a processing chamber, where the wafer is supported and heated from below via a heater pedestal having a diameter larger than that of the wafer. A process fluid flowing downward toward the top of the wafer is inhibited from depositing near the wafer edge by a shadow ring. The shadow ring, which is placed over but does not contact the wafer, physically masks an annular strip of the wafer near its edge. The shadow ring inhibits deposition of process fluides on the wafer in two distinct ways. First, the shadow ring physically obstructs process gas, flowing downward from above the wafer, from depositing on the masked portion of the wafer. Second, the shadow ring is used to direct a flow of a purge gas to inhibit process gas from seeping under the shadow ring and depositing near the wafer edge. A purge gas manifold is defined by a cylindrical annulus located concentrically below the shadow ring and circumscribing the heater pedestal. A purge gap between the wafer and the shadow ring forms the outlet of the purge gas manifold. The purge gas flows out of the purge gap, inhibiting the process gas from entering the purge gap, and thus further inhibiting deposition on the masked portion of the wafer.