The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 23, 1999

Filed:

Apr. 21, 1997
Applicant:
Inventors:

Scott T Becker, San Jose, CA (US);

Steve P Kornachuk, San Jose, CA (US);

Assignee:

Artisan Components, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518905 ; 365196 ; 36523008 ;
Abstract

Disclosed is an apparatus for generating a memory access signal. The apparatus includes a latch having a set state for driving a set transistor, and a reset state for driving a reset transistor. The latch having an input terminal and an output terminal, and the latch transitions between the set and reset states in accordance with a system clock signal. The apparatus further includes a driver coupled to the output terminal of the latch for producing an access signal, and feedback path for feeding back the access signal to the input terminal of the latch. Wherein the latch operates to switch from the set state to the reset state in accordance with the fed back access signal. In this manner, the system clock is isolated from the set transistor when the latch is already in the set state. Further, the latch operates to switch from the reset state to the set state in accordance with the fed back access signal, such that the system clock is isolated from the reset transistor when the latch is already in the reset state.


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