The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 1999
Filed:
Aug. 21, 1996
Applicant:
Inventors:
Percy V Gilbert, Austin, TX (US);
Subramoney Iyer, Austin, TX (US);
Bradley P Smith, Austin, TX (US);
Matthew A Thompson, Round Rock, TX (US);
Kevin Kemp, Dallas, TX (US);
Rajive Dhar, Lisle, IL (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
438129 ; 438424 ; 438692 ; 364491 ;
Abstract
A pattern of dummy structures (20) is added to the layout pattern of an integrated circuit (10) to equilibrate the polishing rate across the surface of a semiconductor substrate (11). The location of each dummy structure (20) is predetermined so that it does not intersect a well boundary (17) or an active region (21,27), and does not fall under a conductive material such as a layer of polysilicon (22,28) or an interconnect structure (23,29).