Formation of gradient doped profile region between channel region and

Abstract

A novel integrated circuit structure, and process for making same, is disclosed wherein a tapered or gradient doped profile region is provided in a semiconductor substrate between the heavily doped drain region and the channel region in the substrate comprising an MOS device. In the process of the invention, a re-entrant or tapered gate electrode, resembling an inverted trapezoid, is used as a mask during a first doping step at a dosage level higher than normally used to form a conventional LDD region. This doping step forms a doped region having a dopant gradient which gradually increases in dosage level with distance from the channel region. Conventional oxide spacers may then be formed on the sidewalls of the gate electrode followed by conventional high level doping to form the heavily doped source and drain region in the unmasked portions of the substrate between the oxide spacers and the field oxide isolation. Since the doped region beneath the oxide spacers includes a gradient doped profile region, with the lightest level of dopant adjacent the channel region (since more of the tapered gate electrode acted as a mask for the initial implantation), the overall dosage level used in the first implantation step to form the gradient doped profile region may be higher than the dosage level conventionally used to form a conventional LDD region. The resistance of the path between the heavily doped drain contact region and the channel region, which includes the gradient doped profile region, is therefore lower than the resistance of a conventional LDD region.