The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 1999
Filed:
Apr. 06, 1998
Applicant:
Inventors:
Min-Hwa Chi, Hsinchu, TW;
Ming-Zen Lin, Hsinchu, TW;
Assignee:
Vanguard International Semiconductor Corporation, Hsin-Chu, TW;
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365203 ; 365149 ;
Abstract
A pre-charge and isolation circuit for a folded bit line DRAM array to reduce noise coupling between adjacent bit lines of a DRAM array by connecting only one bit line within one sub-array to be connected to a sense amplifier, while the complementary bit line used for the reference voltage of the sense amplifier is selected from an adjacent sub-array, is disclosed. The isolation pre-charge circuit will be connected to a pair of bit lines within a DRAM array to pre-charge portions the pair of bit lines to a reference voltage level and to connect a selected DRAM cell to a latching sense amplifier.