The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 1999
Filed:
May. 09, 1997
Fumiki Aiso, Tokyo, JP;
Toshiyuki Hirota, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
At first, a silicon oxide layer is selectively formed on the surface of a semiconductor substrate. Next, a first amorphous silicon film doped with phosphorous in the concentration of about 1.times.10.sup.20 (atoms/cm.sup.3) and a non-doped second amorphous silicon film are deposited in sequential order. By this, an amorphous silicon layer for lower electrode constituted of the first and second amorphous silicon films is formed. Then, an HSG (unevenness) is formed on the surface of the amorphous silicon layer for lower electrode. Subsequently, the amorphous silicon layer for lower electrode is patterned to form a lower electrode of the stack type capacitive element. Thereafter, a capacitance insulation layer is formed on the upper surface and the side surface of the lower electrode. Then, over the entire surface, an upper electrode is deposited.