The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 1999

Filed:

Jan. 28, 1997
Applicant:
Inventors:

Peter Lynn Balzer, Chenango Forks, NY (US);

Robert Lee Lewis, Apalachin, NY (US);

Robert David Sebesta, Endicott, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C23F / ;
U.S. Cl.
CPC ...
216-2 ; 216 52 ; 430311 ; 437 51 ; 437195 ; 437208 ; 437225 ;
Abstract

A multilayer circuit fabrication approach and circuitized substrate are presented wherein at least two conductive layers are formed over a substrate. The conductive layers are separated by a first dielectric layer and the structure is encapsulated with a second dielectric layer. The first dielectric layer includes open areas exposing a portion of the underlying support structure aligned to those areas where contact points are to reside in the second conductive layer. The first dielectric layer comprises a blanket dielectric layer such that recesses are defined in the upper surface thereof aligned to the open areas of the first conductive layer. The second conductive layer thus resides in two planes, both of which comprise planes other than a plane of the first conductive layer. A plurality of openings can be simultaneously formed to expose contact points in both the first and second conductive layers.


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