The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 1999
Filed:
Dec. 29, 1995
Barry R Davis, Scottsdale, AZ (US);
Bruce Young, Tigard, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A computer system is described having one or more host processors, a host chipset and a input/output (I/O) subsystem. The host processors are connected to the host chipset by a host bus. The host chipset is connected to the input/output subsystem by a primary personal computer interface (PCI) bus. The I/O subsystem is connected to I/O devices by a secondary PCI bus. The I/O subsystem includes advanced programmable interrupt controller (APIC) functionality typically provided within an I/O APIC chip within a host chipset. The APIC functionality of the I/O subsystem is primarily implemented in software executing on a core processor of the I/O subsystem. The software creates and accesses various APIC registers and tables, such as a redirection table, within a memory of the I/O subsystem. A single 3-wire APIC bus interconnects the host processors with the I/O subsystem. With this arrangement, non-PCI interrupt lines from the I/O devices are connected only into the I/O subsystem, rather than into the host chipset.