The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 1999

Filed:

Feb. 24, 1997
Applicant:
Inventors:

Naoki Kasai, Tokyo, JP;

Hiroshi Watanabe, Tokyo, JP;

Hiroki Koga, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365149 ; 365 51 ; 365 63 ;
Abstract

In a 2.sup.m (m=1, 2, . . . )-valued semiconductor memory device, including a plurality of word lines, a plurality of bit line pairs, and a plurality of memory cells each connected to one of the word lines and one bit line of the bit line pairs, each of the bit line pairs are divided into m divided bit line pairs, and a ratio of capacitances of the m divided bit line pairs is 1:2: . . . :2.sup.m-1. Also, each sense amplifier is connected to one of the bit line pairs. Further, each of coupled capacitor pairs is cross-coupled between two adjacent divided bit line pairs of the divided bit line pairs.


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